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TC850 Data Sheet

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发表于 2010-4-17 17:34:50 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
  TC850 Data Sheet



The TC850 is a monolithic CMOS analog-to-digital converter (ADC)with resolution of 15-bits plus sign. It combines a chopper-stabilized buffer and integrator with a unique multiple-slope integration technique that increases conversion speed. The result is 16 times improvement in speed over previous 15-bit, monolithic integrating ADCs (from 2.5 conversions per sec up to 40 per sec). Faster conversion speed is especially welcome in systems with human interface,such as digital scales. The TC850 incorporates an ADC and a µP-compatible digital interface. Only a voltage referenceand a few noncritical passive components are required to form a complete 15-bit plus sign ADC. CMOS processing provides the TC850 with high-impedance differential inputs.Input bias current is typically only 30pA, permitting direct interface to sensors. Input sensitivity of 100 µV per least significant bit (LSB)eliminates the need for precision external amplifiers. The internal amplifiers are auto-zeroed,guaranteeing a zero digital output with 0V analog input. Zero adjustment potentiometers or calibrations are not required. The TC850 outputs data on an 8-bit, 3-state bus. Digital inputs are CMOS compatible;outputs are TTL/CMOS compatible. Chip-enable and byte-select inputs combined with an end-of-conversion output ensures easy interfacing to a wide variety of microprocessors. Conversions can be performed continuously or on command.In continuous mode, data is read as three consecutive bytes and manipulation of address lines is not required. Operating from ±5V supplies,the TC850 dissipates only 20mW.It is packaged in 40-pin plastic or ceramic dual-in-line packages (DIPs)and in a 44-pin plastic leaded chip carrier (PLCC),surface-mount package.

Parameter Name  Value
Supply Voltage (V)  5
Input Voltage Range (V)  Vss + 1.5 to Vdd - 1.5
DMM  No
Max Power (mW)  35
Resolution (Digits)  15
Resolution (Counts)  32768
Interface  8-bit Parallel
Temp Range (°C)  -25 to +70
Device Description  Binary A/D

     Features
15-bit Resolution Plus
Sign Bit
Up to 40 Conversions per Second - 12 Conversions per Second Guaranteed
Integrating ADC Technique
— Monotonic
— High Noise Immunity
— Auto-Zeroed Amplifiers Eliminate Offset
Trimming
Wide Dynamic Range ................................ 96dB
Low Input Bias Current ............................ 30pA
Low Input Noise ................................ 30mVP-P
Sensitivity ...................................... 100mV
Flexible Operational Control
— Continuous or On-Demand Conversions
— Data Valid Output
Bus Compatible, 3-State Data Outputs
— 8-Bit Data Bus
— Simple µP Interface
— Two Chip Enables
— Read ADC Result Like Memory
± 5V Power Supply Operation .................... 20mW


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